| Week # | 1st session | 2nd session | 3rd session |
| 1 (02/14, 2017) | Course overview. | Selection test for 10 students - ranged from Chapter 1 to 6 of Digital Fundamentals. | |
| 2 (02/21, 2017) | Digital concepts. | Number system, operations, and codes. | Practice 1. |
| 3 (228 Memorial Day, 02/28, 2017) | Break. | ||
| 4 (03/07, 2017) | Logic gates. | Boolean algebra and logic simplification. | Practice 2. |
| 5 (03/14, 2017) | Combinational logic analysis. | Functions of combinational logic. | Practice 3. |
| 6 (03/21, 2017) | Latches, flip-flops, and timers. | Counters. | Practice 4. |
| 7 (03/28, 2017) | Shift registers. | Memory and storage. | Practice 5. |
| 8 (Spring break, 04/04, 2017) | Break. | ||
| 9 (Mid-term, 04/11, 2017) | Break. | ||
| 10 (04/18, 2017) | Programmable logic and software. | Signal interfacing and processing. | Practice 6. |
| 11 (04/25, 2017) | Computer concepts. | Integrated circuit technologies. | Practice 7. |
| 12 (05/02, 2017) | Overview of digital design with Verilog HDL. | Hierarchical modeling concepts. | Practice 8. |
| 13 (05/09, 2017) | Basic concepts. | Modules and ports. | Practice 9. |
| 14 (05/16, 2017) | Gate-level modeling. | Dataflow modeling. | Practice 10. |
| 15 (JpGU 2017, 05/23, 2017) | Behavioral modeling. | Tasks and functions. | Practice 11. |
| 16 (Dragon Boat Festival, 05/30, 2017) | Break. | ||
| 17 (06/06, 2017) | Useful modeling techniques. | Timing and delays. | Practice 12. |
| 18 (Final, 06/13, 2017) | Break. | ||