| Week # | 1st session | 2nd session | 3rd session |
| 1 (02/26, 2021) | Course overview | Selection test for 10 students - ranged from Chapter 1 to 6 of Digital Fundamentals | |
| 2 (03/05, 2021) | Digital concepts | Number system, operations, and codes | Practice 1 |
| 3 (03/12, 2021) | Logic gates | Boolean algebra and logic simplification | Practice 2 |
| 4 (03/19, 2021) | Combinational logic analysis | Functions of combinational logic | Practice 3 |
| 5 (03/26, 2021) | Latches, flip-flops, and timers | Counters | Practice 4 |
| 6 (Spring break, 04/02, 2021) | Break | ||
| 7 (04/09, 2021) | Shift registers | Memory and storage | Practice 5 |
| 8 (04/16, 2021) | Programmable logic and software | Signal interfacing and processing | Practice 6 |
| 9 (Mid-term, 04/23, 2021) | Break | ||
| 10 (04/30, 2021) | Computer concepts | Integrated circuit technologies | Practice 7 |
| 11 (PhD oral exam 05/07, 2021) | Break | ||
| 12 (05/14, 2021) | Overview of digital design with Verilog HDL | Hierarchical modeling concepts | Practice 8 |
| 13 (05/21, 2021) | Basic concepts (https://meet.google.com/bmk-hyno-mpx) | Modules and ports | Practice 9 |
| 14 (05/28, 2021) | Gate-level modeling (https://meet.google.com/bmk-hyno-mpx) | ||
| 15 (06/04, 2021) | Dataflow modeling (https://meet.google.com/bmk-hyno-mpx) | Practice 10 | |
| 16 (06/11, 2021) | Behavioral modeling (https://meet.google.com/bmk-hyno-mpx) | Tasks and functions | Practice 11 |
| 17 (06/18, 2021) | Useful modeling techniques (https://meet.google.com/bmk-hyno-mpx) | Timing and delays | Practice 12 |
| 18 (Final, 06/25, 2021) | Break | ||